Plugins
The functional behaviour of a FPGA board changes depending on the programmed firmware. Also, the hardware components of the board may change with different iterations. A dynamic system is required to support different firmware, firmware upgrades and hardware upgrades and configurations. A plugin based approach was adopted to allow compartmentilzation and encapsulation. Plugins can be associated with a specific hardware component (such as ADC, PLL, FPGA, ETH …) or firmware feature (such as channeliser and beamformer). Plugins inherit an abstract plugin class which gives access to the board memory map and has abstract functions for initialization, status checking and cleanup.
In each plugin class, additional attributes can also be defined through decorators, these include
Friendly name, used to refer to a plugin instance
Compatible boards, this will be checked during plugin loading to be compatible with the board in use
Maximum number of instances, this will be checked during plugin loading, instantiating a number of plugins of that type larger than the defined maximum will generate an error
Firmware design association with major and minor version numbers, this will be checked during plugin loading, making sure that the current FPGA firmware is compatible with the plugin
Plugins from previous versions of the board are inherited, but can be overridden.
TPM 1.2 Plugins
- ada
- adc
- adc_power_meter
- adc_power_meter_simple
- antenna_buffer
- beamf_fd
- beamf_simple
- clock_monitor
- cpld
- f2f
- firmware_information
- forty_g_xg_core
- fpga
- i2c
- integrator
- jesd
- lasc
- multiple_channel_tx
- pattern_generator
- pll
- polyfilter_ox
- preadu
- side_channel
- spead_tx_gen
- station_beamf
- sysmon
- ten_g_core
- ten_g_xg_core
- test_generator