test_generator

Overview

configuration of the test signal generator, can generate ADC data.

Python Class & Methods Index

class pyfabil.plugins.tpm.test_generator.TpmTestGenerator(board, fsample=800000000.0, **kwargs)[source]

Test signal generator The test generator produces up to 4 signals. Each signal has an associated amplitude, that is initialized to 0 and stored internally. Specifying an amplitude of -1 (default) uses the internally stored value

Methods set_tone, set_pulse_frequency, enable_prdg set the parameters for the two tones, the pulse generator and the pseudorandom white noise

Each ADC channel has a settable delay, in steps of 1 sample and range of -123 to 127 samples. Delay is applied after the generator and is positive for increased delay.

test_generator.set_tone(dds, frequency, ampl=-1.0, phase=0.0)

dds = [0 1] DDS number frequency: in Hz ampl: -1 to keep existing, [0.0:1.0] with respect to maximum phase: in turns

test_generator.set_delay(delay)

delay: array[16] of [-123 to 127] in samples

test_generator.disable_prdg() test_generator.enable_prdg(ampl=-1.0)

ampl: -1 to keep existing, [0.0:1.0] with respect to maximum

test_generator.set_pulse_frequency(freq_code, ampl=-1)
freq_code: [0 to 7] selects # of pulses per frame (0.925925 kHz)

0=18 ppf, 1=12, 2=8, 3=6, 4=4, 5=3, 6=2, 7=1,

ampl: -1 to keep existing, [0.0:1.0] with respect to maximum

test_generator.channel_select(channel_select)

channel_select: int16 with 1 bit per channel

channel_select(channel_select)[source]
clean_up()[source]

Perform cleanup :return: Success

disable_prdg()[source]
enable_prdg(ampl=-1.0, timestamp=None)[source]
initialise()[source]

Initialise Test Generator

set_delay(delay)[source]

Set delay for input ADC streams Delay in samples, positive delay adds delay to the signal stream

set_pulse_frequency(freq_code, ampl=-1)[source]

Sets pulse generator repetition rate Codes 0-7 correspond to period (samples) and frequency spacing of 0: 48 16.666667 MHz 1: 72 11.111111 MHz 2: 108 7.407407 MHz 3: 144 5.555555 MHz 4: 216 3.703704 MHz 5: 288 2.777778 MHz 6: 432 1.851852 MHz 7: 864 0.925925 MHz

set_tone(dds, frequency, ampl=-1.0, phase=0.0, timestamp=None)[source]

Set frequency, amplitude and phase for specified DDS Frequency in Hz, amplitude normalized to maximum (32 units), phase in turns If amplitude is negative, use last specified one

status_check()[source]

Abstract method where all status checks should be performed :return: Firmware status